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首页 > 主营产品 > A6801SLW-T 原装现货 技术资料及报价 (附PDF文档) 报价0755-33062501-803黄晓娥

A6801SLW-T 原装现货 技术资料及报价 (附PDF文档) 报价0755-33062501-803黄晓娥

来源: | 发表于:2007年07月30日

 
【产品型号】A6800  A6801
【生产厂家】ALLEGRO
【技术参数】A6801SLW-T   技术参数下载
【产品说明】全新原装现货,07+,详情请直接来电与我联系!!!
 
 
DABiC-5 Latched Sink Drivers
 
The A6800 and A6801 latched-input BiMOS ICs merge high-current,
high-voltage outputs with CMOS logic. The CMOS input section consists
of 4 or 8 data (‘D’ type) latches with associated common CLEAR,
STROBE, and OUTPUT ENABLE circuitry. The power outputs are
bipolar NPN Darlingtons. This merged technology provides versatile,
fl exible interface. These BiMOS power interface ICs greatly benefi t the
simplifi cation of computer or microprocessor I/O. The A6800 ICs each
contain four latched drivers. A6801 ICs contain eight latched drivers.
The CMOS inputs are compatible with standard CMOS circuits. TTL
circuits may mandate the addition of input pull-up resistors. The bipolar
Darlington outputs are suitable for directly driving many peripheral/
power loads: relays, lamps, solenoids, small dc motors, etc.
All devices have open-collector outputs and integral diodes for inductive
load transient suppression. The output transistors are capable of
sinking 600 mA and will withstand at least 50 V in the OFF state.
Because of limitations on package power dissipation, the simultaneous
operation of all drivers at maximum rated current can only be accomplished
by a reduction in duty cycle. Outputs may be paralleled for
higher load current capability.
The A6800SA is furnished in a standard 14-pin DIP; the A6800SL and
A6801SLW in surface-mountable SOICs; the A6801SA in a 22-pin
DIP with 0.400” (10.16 mm) row centers; the A6801SEP in a 28-lead
PLCC. These devices are lead (Pb) free, with 100% matte tin plated
leadframes.
 
 
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QQ:844423629
MSN:sumzi007@sumzi.com
E-mail:sumzi007@sumzi.com
 
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