SLA7052M
Unipolar Stepper-Motor Translator/PWM Driver

Features

• 3 A Output Rating
• Internal Sequencer for Full or Half-Step Operation
• PWM Constant-Current Motor Drive
• Cost-Effective, Multi-Chip Solution
• 100 V, Avalanche-Rated NMOS
• Low rDS(on) NMOS Outputs (150 milli-ohms typical)
• Advanced, Improved Body Diodes
• Half-Step and Full-Step Unipolar Drive
• Inputs Compatible with 3.3 V or 5 V Control Signals
• Sleep Mode
• Internal Clamp Diodes

Description

Combining low-power CMOS logic with high-current, high-voltage power FET outputs, the SLA7052M translator/driver provides complete control and drive for a two-phase unipolar stepper motor with internal fixed off time, pulse-width modulation (PWM) control of the output current in a power multi-chip module (PMCMT).

The CMOS logic section provides the sequencing logic, direction, full/half-step control, synchronous/asynchronous PWM operation, and a "sleep" function. The minimum CLOCK input is an ideal fit for applications where a complex µP is unavailable or overburdened. TTL or LSTTL may require the use of appropriate pull-up resistors to ensure a proper input-logic high. For PWM current control, the maximum output current is determined by the user's selection of a reference voltage and sensing resistor. The NMOS outputs are capable of sinking up to 3 A and withstanding 46 V in the off state. Ground-clamp and flyback diodes provide protection against inductive transients. Special power-up sequencing is not required.

Full-step (2 phase) and half-step operation are externally selectable. Two-phase drive energizes two adjacent phases in each detent position (AB-BC-CD-DA). This sequence mode offers an improved torquespeed product, greater detent torque, and is less susceptable to motor resonance. Half-step excitation alternates between the one-phase and two-phase modes (A-AB-B-BC-C-CD D-DA), providing an eight-step sequence.

Functional Block Diagram