Altera Corporation announced FPGA-based support for Ethernet communications protocols

San Jose, Calif., July 24,2007¡ªAltera Corporation (NASDAQ: ALTR) today announced FPGA-based support for Ethernet communications protocols used in industrial automation applications, including ProfiNet, Ethernet/IP, Modbus-IDA, EtherCAT, SERCOS III Interface, and Ethernet Powerlink. Intellectual property (IP) cores for these key communications protocols can now be implemented on Altera¡¯s low-cost Cyclone^® series FPGAs.

The Industrial Ethernet IP cores enable designers to implement any of the standards on a single board. This not only reduces form factor but saves time. System OEMs can now add industry-standard networking capabilities to their automation products cost-effectively while retaining FPGA reprogrammable design flexibility in their systems.

Ethernet is gaining traction as the preferred factory network protocol because of its cost and performance benefits, hardware availability and ease of implementation. The worldwide market for industrial Ethernet is expected to grow at a compounded annual growth rate (CAGR) of 51.4 percent over the next five years. The market totaled 840,000 units in 2004 and is forecasted to total just over 6.7 million units in 2009, according to a recent study by the ARC Advisory Group.

¡°The big decision facing device manufacturers is, which of the popular protocols they should design into their products,¡± said Michael Samuelian, director of Altera¡¯s industrial business unit. ¡°The FPGA¡¯s design flexibility eliminates the ¡®protocol decision¡¯ and allows developers to support multiple protocols within a single product. Altera is the only company bringing together the leading IP partners and low-cost FPGA solutions for the industrial customer base.¡±

To support Cyclone series FPGA-based industrial designs, IXXAT, one of Altera¡¯s IP partners, is offering an industrial Ethernet development kit. The kit consists of a Cyclone-based reference design and evaluation board, schematics and executables for the FPGA bitstream, including a protocol stack, MAC, TCP/IP stack, interface application and a host application program interface (API) in source code.