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Micrel Announces New LVPECL/LVDS, Ultra-Low Jitter Clock Dividers With Unique Fail Safe I/O Protection and Internal Termination

发布时间:2007-12-13 浏览:3630次
 San Jose, Calif., Dec. 6, 2007 —Micrel Inc., ( Nasdaq:MCRL), an industry leader in analog, high bandwidth communications, and Ethernet IC solutions, today added four new divide by three and divide by five clock dividers to their clock divider product family. The SY89228/ 229 are1GHz LVPECL/LVDS dividers that feature Fail Safe Input (FSI) circuitry and the SY89230/231 are 3.2GHz LVPECL/LVDS dividers.  Targeted applications include pre-scaling functions, PLL clock generation and distribution, RF transmitters, and wireless base stations. All devices are currently in volume production with pricing for 1K quantities starting at $2.69. In addition, free evaluation boards are also available.

“These new divide by three and divide by five clock dividers are the only clock dividers that divide “odd” numbers and provide 50 percent duty cycle currently on the market,” said Thomas S. Wong, vice president high bandwidth products, Micrel.  “The SY89228/229 offer our very own FSI feature, which provides a simple, integrated, transparent solution for hot swap or failed input conditions. This is particularly important for the prevention of unstable output conditions in rack-based equipment that must continue to operate while servicing I/O cards.”

The new devices are unique in that they are odd dividers, but provide a 50 percent duty cycle when the input clock has a 50 percent duty cycle. Most dividers in the industry are even dividers, which require two times the starting frequency in order to provide a 50 percent duty cycle at the output. Moreover, the Micrel devices are offered in an ultra-small 16-pin MLF ® package that saves critical space while providing excellent performance.

The SY89228U and SY89229U, along with the rest of the FSI family of solutions, are optimized to prevent unwanted oscillations and maintain output stability when an input signal’s swing collapses or disappears.  Unlike existing LVPECL or LVDS dividers currently on the market, Micrel’s FSI family prevents a metastable output condition when the input signal is removed or the amplitude fails.  This is especially crucial for rack-based equipment that has many I/O cards requiring Hot Swap capability.  In addition, the SY89228-231 divider product family offers Micrel’s patented 3-pin internal input termination, which simplifies designs and interfaces to any differential signal, AC- or DC-coupled, without any level shifting or termination resistor networks in the signal path.

AC performance is guaranteed from DC through 1GHz, with rise and fall times less than 270ps for the SY89228 and SY89229 LVPECL and LVDS outputs, respectively. Additionally, AC performance is guaranteed from DC through 3.2GHz, with rise and fall times less than 200ps for the SY89230 and SY89231 LVPECL and LVDS outputs, respectively. The SY89228-231 divider product family guarantees jitter performance to be less than 10ps p-p over temperature and voltage, operation over the full industrial temperature range (-40C to +85C), and supply voltage operation from 2.5V to 3.3V.  All solutions are available in MLF ® packaging, which features low inductance and capacitance, making the SY89228-231 divider series ideal for today’s high-speed, low jitter designs . 

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