Altera Introduces Arria GX Family of Transceiver-Based FPGAs

Altera Corp. released the Arria GX family of transceiver-based field programmable gate arrays (FPGAs) to support PCI Express (PCIe), gigabit Ethernet (GbE) and serial RapidIO (SRIO) standards up to 2.5 Gbps.

The FPGAs are designed for use in the communications, computer, storage and industrial markets.

Features of the Arria GX family include Stratix II GX transceiver technology, flip-chip packages for signal integrity, software tools and verified intellectual property (IP) cores.

The Arria GX family comprises five devices ranging in density from 21,580 to 90,220 logic elements (LEs), up to 4.5 Mb of embedded memory and up to 176 multipliers.

The devices are built on the Taiwan Semiconductor Manufacturing Company (TSMC) 90 nanometer (nm) process.

"What differentiates Arria GX devices from other offerings in the market is ... a combination of powerful attributes," said Jordon Plofsky, Altera senior vice president of marketing.

"Primarily, customers are getting a very reliable product - proven transceiver technology built on a proven process. Next, the price is unparalleled for such a comprehensive product. Finally, we designed it to maintain the best levels of signal integrity - each member of this family is available in flip-chip packages," Plofsky said.

Arria GX FPGAs provide up to 12 full-duplex transceiver channels to implement the PCIe, GbE and SRIO protocols. They offer a design environment that includes software tools, characterization reports, reference designs and verified IP cores that meet compliance and interoperability, according to Altera.

To start designing with Arria GX devices, customers can use Quartus II design software version 7.1. Volume production begins in June 2007.